| NOP | 0x00 | No operation |
| HLT | 0x01 | Halt processor, set H flag |
| INT | 0x02 | Software interrupt #n |
| RTI | 0x03 | Return from interrupt |
| EI | 0x04 | Enable interrupts (set I flag) |
| DI | 0x05 | Disable interrupts |
| LDI | 0x10 | Load 16-bit immediate into Rd |
| LDR | 0x11 | Load word from absolute address |
| LDX | 0x12 | Load word, register + offset |
| STR | 0x13 | Store word to absolute address |
| STX | 0x14 | Store word, register + offset |
| MOV | 0x15 | Register to register copy |
| LDB | 0x16 | Load byte (zero-extended) |
| STB | 0x17 | Store low byte of register |
| ADD | 0x20 | Rd = Rs + Rt (sets C, V, N, Z) |
| SUB | 0x21 | Rd = Rs − Rt (sets C, V, N, Z) |
| MUL | 0x22 | Rd:Rd+1 = Rs × Rt (32-bit product) |
| DIV | 0x23 | Rd = Rs ÷ Rt; NMI on div/0 |
| MOD | 0x24 | Rd = Rs mod Rt |
| ADDI | 0x25 | Rd = Rs + 8-bit immediate |
| SUBI | 0x26 | Rd = Rs − 8-bit immediate |
| INC | 0x27 | Rd++ |
| DEC | 0x28 | Rd−− |
| NEG | 0x29 | Rd = −Rd (two's complement) |
| AND | 0x30 | Rd = Rs AND Rt |
| OR | 0x31 | Rd = Rs OR Rt |
| XOR | 0x32 | Rd = Rs XOR Rt |
| NOT | 0x33 | Rd = NOT Rs (bitwise) |
| SHL | 0x34 | Rd = Rs « n (sets C on overflow) |
| SHR | 0x35 | Rd = Rs » n (logical) |
| ASR | 0x36 | Rd = Rs » n (arithmetic, sign-ext) |
| MLOAD | 0x37 | DMA vertex array; MX ← vtx count |
| MXFR | 0x38 | Set transform: rot/scale/translate/fov |
| MREND | 0x39 | Render mesh → target seg; IRQ5 on done |
| CMP | 0x40 | Set flags for Rs − Rt (no store) |
| CMPI | 0x41 | Set flags for Rs − 16-bit immediate |
| TEST | 0x42 | Set N/Z for Rs AND Rt (no store) |
| STON | 0x43 | Fire channel: freq, wave, vol; SX ← cfg |
| STOF | 0x55 | Stop channel #n immediately |
| SENV | 0x56 | Set ADSR from MX (att|dec) / SX (sus|rel) |
| JMP | 0x50 | Unconditional jump (absolute) |
| JEQ | 0x51 | Jump if Z set |
| JNE | 0x52 | Jump if Z clear |
| JLT | 0x53 | Jump if N ≠ V |
| JGT | 0x54 | Jump if Z clear and N = V |
| JSR | 0x57 | Jump to subroutine (push PC) |
| RET | 0x58 | Return from subroutine (pop PC) |
| JMPR | 0x59 | Jump to address in register |
| JC | 0x5A | Jump if carry set |
| JNC | 0x5B | Jump if carry clear |
| VPIX | 0x5C | Plot pixel: R0=X R1=Y R2=colour |
| SYNC | 0x5D | Stall until coprocessor mask idle |
| PUSH | 0x60 | Push register onto stack |
| POP | 0x61 | Pop from stack into register |
| PUSHI | 0x62 | Push 16-bit immediate |
| PUSHA | 0x63 | Push all registers + SR |
| POPA | 0x64 | Pop all registers + SR |
| SEL | 0x70 | Set active data segment (0–7) |
| SREAD | 0x71 | Read word from explicit segment |
| SWRITE | 0x72 | Write word to explicit segment |
| SREADR | 0x73 | SREAD with register address |
| SWRITER | 0x74 | SWRITE with register address |
| OUT | 0x80 | Write register to I/O port |
| IN | 0x81 | Read I/O port into register |
| OUTI | 0x82 | Write 16-bit immediate to I/O port |